SENIOR ENGINEERING MANAGER W/ CRYPTO & CONSUMER ELECTRONIC BACKGROUND (D. Michel G. Combes)
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Engineer with track record in leadership, execution,
technology advancement and business growth since 1989

Met or exceeded all schedules, performance targets and organization goals
with more than 16 patents, 52 tape-outs, 28 prototypes and 16 papers. 
Pluri-diciplinary: worked in different semiconductor industry segments:
  Wearable,Display,Storage,Wireless,CPU,Telecom. 
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OBJECTIVE:

  * To obtain a position as a development team manager 
  * Be recognized as an expert in cryptocurrency and ledger technology architecture
  * Dramatically and positively impact the company's core business
  * Growth and attain influential role in the company

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RELEVANT EXPERIENCE:

GC-Bank                                                                2018
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BlockChain Lead developer        -- Cryptocurrencies and ledger technologies
   * currently developing  blockRings for IPH*System
   * develop participatory token for U-Nion TV media
   * Launched CERES platform as a transformative economy experiment
   * issued the first cryptomorphic currency LVC for a Festival in Miami
   * setup GC-bank portfolio and associated coin forge for minted currencies
   * developed non-proof of work blockchains
   * invented smart litigation and proof of witness for solution to double spending problem
   * developed non-consensus based ledger as byzantine resistant system
   * developed system robust to Sybil attack for identity management

Intel Semiconductor                                                2015-2018
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Lead Electrical Engineer R&D Architect -- light weight smart glasses
   * deploy production validation and characterization flow on manufacture line
   * Build and Ramp up volume for Vaunt smart glasses.
   * Design MEMs electronic control and drive algorythm.

Lemoptix                                                           2012-2015
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Head of Electrical Engineer -- picoprojector, wearable, Head up Displays
   * Architect mems based picoprojector plateform, lead prototyping team
   * Lead Design and Manufacture of Headup displays, companion projectors
     and Monochrome Smart Glasses
   * Electrical Engineegimg Team responsible for design of company chipset

Intersil Inc.                                                      2010-2011
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Principal Engineer  -- laser drivers, reference design, video processor
   * Build reference designs for pico-projector, prepared CES demos
     ( worked with major customers in the field Syndiant, Micron, LGE, MVIS, Bosh, bTendo )
   * Defined ARM based video processor architecture for MEMs scanner display systems,
     geometric correction, mixed signal servoing of laser beams,
     temperature and power management, white balance contolled loops
   * Published Datasheet and supporting documentations for products release
   * Designed drivers for native / direct green lasers (Nishia, Soraa, OSRAM)

Spatial Photonics Inc.                                             2006-2008
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Sr. Electrical Engineering Manager  --    pico-projectors and MEMs displays
   * Developed FPGA demonstration boards for MEMs technology display
   * Assembled bulk DC convertor for high efficiency LED illumination
   * Developed algorithm for pixel rendering in a video system
     using Pulse Width Modulation (PWM) 
   * Coded RTL for a dithered gamma correction module 
   * Directed LED projector System Architecture team

APT Technologies Inc.                                              2001-2002
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Mixed Signal Design Director  --   Serial ATA / High Speed IOs and switches
  * Directed the Analog design Group of APT technologies.
  * Architected Out-of-Band Signaling for HDD / IDE interface
  * Managed analog filters amplifiers, voltage references, signal detection and Gibabit SERDES module designs
  * Prototyped Serial-ATA host bus adapter and routers enabling RAID and SCSI low cost solutions 
  * Deployed ASIC methodology and provided tools and EDA support to the company.
  * Supported Layout design, chip integration, verilog coding, modelsim and SPICE simulations, synplify, leonardo synthesis, place and route, design space exploration and optimization script using AI/CI technology .
  * Co-edited Serial ATA early specification 

Infineon Technologies Corp.                                        1999-2001
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System Integration Manager  --           Read/Write Channel, HDD Controller
  * Lead SoC integration team to acheive a "one-chip" disk drive
  * Defined test plan and validation strategy for HDD Controller
  * Managed IC design team to implement SATA PHY and Transport layers
  * coded, simulated, and evaluated MAC module for HDD controller


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Knowledge of tools:

  * FPGA Xilinx ISE-EDK, Altera Quartus, Synplify
  * ModelSim, Aldec Active-HDL, NC Verilog
  * VHDL, Verilog, Python, Perl, tk, tcl, C#, C++, TCP/IP, RFCs, Solidity
  * Synopsys, MentorGraphics, Cadence, Magma
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EDUCATION:

  * Ph.D. from University Pierre and Marie Curie (France)
  * Engineering Degree from Electronics Superior Institute of Paris (France)